Boolean Algebra and Logic gates: Building Blocks of Digital Circuits

Understanding Small Scale Integrated Circuits
In this very first experiment of the digital electronics laboratory, the aim is to get acquainted with the usage of breadboard and Integrated Circuits(ICs) to build basic digital circuits, verify the truth table of the circuits and the Boolean Laws. Boolean algebra also forms the core of all digital electronics concepts you will come across in the future.

Postulates and Theorems of Boolean Algebra:

Postulate 1 — Closure:
The set {0,1} is closed with respect to the AND(.)and OR(+) operations
Truth Table of AND operation

Truth Table of OR operation
******
Postulate 2 — Identity: 
(a) x+0 = x
The element 0 is an identity element with respect to +
(b) x.1 = x
The element 1 is an identity element with respect to -
 ******

Postulate 3 — Commutativity:
(a) x+y = y+x
(b) x.y = y.x
 ****** 
Postulate 4 — Distributivity:
(a) x.(y+z) = x.y + x.z
AND operation is distributive over OR operation
(b) x+(y.z) = (x+y).(x+z)
OR operation is distributive over AND operation
 ****** 
Postulate 5 — Complement: 
(a) x+x’ = 1
(b) x.x’ = 0
The postulates listed above are called Huntington’s postulates for Boolean Algebra. These postulates can be used to prove the various theorems associated with Boolean Algebra.
Theorem 1 — Idempotent Law: 
(a) x+x = x
(b) x.x = x
Proof: 
(a) x+x = (x+x).1 (Identity)
= (x+x)(x+x’) (Complement)
= x+(x.x’) (Distributivity)
= x+0 (Complement)
= x (Identity) 

(b) x.x = x.x+0 (Identity)
= x.x+x.x’ (Complement)
= x.(x+x’) (Distributivity)
= x.1 (Complement)
= x (Identity)

An important property of Boolean Algebra is the duality principle. It states that the dual of an algebraic expression inferred from the postulates is valid too. To obtain the dual of an algebraic expression interchange AND and OR operators, and 1s and 0s.

For Example: Consider the idempotent law x+x = x. This has been proven to be valid using the postulates. The dual of this expression is x.x = x is valid too.

The postulates themselves occur in pairs, each postulate is the dual of the one paired with it.
 ****** 
Theorem 2 — Dominance: 
(a) x+1 = 1
(b) x.0 = 0
Proof: x+1 = x+x+x’ (Complement)
= x+x’ (Idempotent)
= 1 (Complement)

Dual of this expression is x.0 = 0, which is also valid by the duality principle.
 ****** 
Theorem 3 — Involution(or Double Complement):
(x’)’ = x
Proof: x+x’ = 1 (Complement)
Let x’ be denoted by w
x+w = 1

x is not equal to w as x is not equal to x’
x = w’ (Complement)
x = (x’)’ as w=x’
 ****** 
Theorem 4 — Associativity:
(a) x+(y+z) = (x+y)+z
(b) x.(y.z) = (x.y).z
 ****** 
Theorem 5 — De Morgan:
(a) (x+y)’ = x’y’
(b) (x.y)’ = x’ + y’
Theorem 4 and 5 can be proved using the corresponding truth tables as their conventional proofs are very lengthy.
 ****** 
Theorem 6 — Absorption:
(a) x+xy = x
(b) x.(x+y) = x
Proof: x+xy = x.1+xy (Identity)
= x.(1+y) (Distributivity)
= x.1 (Dominance)
= x (Identity)
By Duality, x.(x+y) = x is valid too.
Redundancy Laws:
(a) x+x’y = x+y
(b) x.(x’+y) = xy
Proof: x+x’y = (x+x’)(x+y) (Distributivity)
= 1.(x+y) (Complement)
=x+y (Identity)

By Duality, x.(x’+y) = xy

When implementing a circuit, a lot of gates could be used and connections might become very complex.

Consider the following digital circuit:

Full Adder Circuit
The Circuit shown above uses 9 NAND gates. The IC 7400 contains 4 NAND gates. To implement this circuit 3 7400 ICs are required. The 7400 ICs consisting of logic gates are Small Scale Integrated (SSI) Circuits.

Labelling the terminals of each NAND with corresponding IC pin number can help us in systematically proceeding with the connections. In order to correctly assign the pin numbers to the terminals we need to know the pin diagram of 7400 IC. 

IC 7400 Pin Diagram

Pins 1 and 2, 4 and 5, 10 and 9, 13 and 12 are the pin numbers that can be assigned to the inputs. The corresponding outputs are taken from pins 3, 6, 8 and 11. (This orientation is same for all the most commonly used Quad-2 Input gates of the 7400 series except IC 7402, the NOR gate IC)




The NAND gates numbered 1,2,3 and 4 belong to the first IC. 5,6,7 and 8 belong to the second and 9 belong to the third IC. The inputs A and B are connected to pin 1 and 2 of the first IC. Pin 1 of the first IC is shorted with pin 5 of the first IC. Pin 3 of first IC is shorted with pins 4 and 10 of the first IC and pin 2 of the third IC.

Labelling the circuit with the corresponding pin numbers makes it easier to give the connections, and in case an error occurs, debugging is also easy.

To ensure safety, the power supply shouldn’t be turned ON till the connections are given completely (For 7400 series the 7th pin should be grounded and 14th pin should be connected to VCC to turn on the IC). To verify intermediate stages turn ON the supply only when required. If the IC becomes hot or there is a burning smell, there might be short circuit and the IC could have burnt due to the large amount of current flowing through it. In such a scenario turn of the power supply. Remember that ICs are very sensitive! The power supplied should be in the limits mentioned by the manufacturer. For the TTL (Transistor Transistor Logic) ICs, the supply voltage is 5V. Also be careful with the nimble pins of the ICs. Be slow when inserting and removing the ICs from the breadboard.

If all the connections are right (and the IC has not burned!), but the output is not obtained, try correcting the loose connections first. If this does not work too, then get the IC tested and replaced. In very rare cases, there might be a fault with the breadboard. Replace the breadboard as the last resort.

Don’t stop with the experiments listed in the curriculum. There are a lot of interesting circuits out there to be explored! Have fun experimenting with ICs.


References:
M. Morris Mano, Michael D. Ciletti, “Digital Design”, 4th Edition
  • Chapter 2 — Boolean Algebra and Logic Gates
  • Section 11.3: Experiment 2 — Digital Logic Gates
Source: This article was published on LinkedIn by Vasanthraj Kirubhakaran

0 comments:

Post a Comment